Found 13 repositories(showing 13)
Swarnajitronty
Hardware accelerator for pruned Wav2Letter ASR model using Custom Function Unit (CFU). Optimizes inference latency through FPGA-based acceleration while maintaining >72% accuracy on speech recognition tasks. Final project for AAML2025 course at NYCU, implementing efficient convolution and LeakyReLU operations in Verilog.
cseslowpoke
No description available
wuwrh
No description available
yuecharlielee
No description available
Victor-zyy
AAML-2025 Labs and CFU-Playground Learn
ph1223
No description available
tuhao-arstia
AAML-2025-Final-Project-Team 12
nycu-caslab
No description available
czl0706
No description available
Cyeehua
No description available
Appmedia06
No description available
Username148576
No description available
No description available
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