Found 9 repositories(showing 9)
Swarnajitronty
Hardware accelerator for pruned Wav2Letter ASR model using Custom Function Unit (CFU). Optimizes inference latency through FPGA-based acceleration while maintaining >72% accuracy on speech recognition tasks. Final project for AAML2025 course at NYCU, implementing efficient convolution and LeakyReLU operations in Verilog.
ph1223
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nycu-caslab
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czl0706
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Cyeehua
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Appmedia06
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tuhao-arstia
AAML-2025-Final-Project-Team 12
Username148576
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