Merge pull request #9 from AsFigo/vhdl_1st

Fixed ROUND issue for EXP

Merge pull request #8 from AsFigo/vhdl_1st

VHDL version being rolled out - ROUND function works now

Merge pull request #7 from AsFigo/e_val_fix

Fixed rounding issue #6

Merge pull request #5 from apseng03/main

Add files via upload

Create README.md

Update README.md

Merge pull request #4 from AsFigo/vec_api

Cleaned up basic version for DAC 2-23 release

Merge pull request #3 from AsFigo/vec_api

Added VEC APIs

Merge pull request #2 from AsFigo/scalar_api