Minor changes to Arc and Actors, making types more compliant for conversion to Verilog.

Created a system test bench for testing a single arc on a FPGA. A dataset is randomly generated, passed through an arc and checked on output.

Double-checked Actor Class still works with changed Arc class. Still only works for one dataset being passed through (i.e. doesn't do streaming) - needs to be addressed.

Sorted out Arc and Arc Testbench. Fairly messy, but it works. There is still a limitation due to the loop count variables not being reset when they're equal, but can be dodged by making the variable larger.

Added DFT and Reorder base classes for flexible radix FFT implementation

Latest version of Actor and Arc Base classes

Oops, actually added DFT now

Added new DFT Actor to HDFT directory, as well as blank test script

Completed Pipelined Mux class. Also created subdirectory for HDFT work.

Completed Butterfly Operation block for FFT, as well as test script for simulation and conversion

Added the Platforms directory, Rhino sub-directory and updated the README

Actor and Arc working in simulation, as well as conversion to Verilog

Currently reworking Actor and Arc model - doesn't currently work, but almost there!

Added actor development script, as well as began work on Actor base class

Further work on Arc base class. Works with variable input-output ratios and size factors, although minor bug when inputs than outputs