Light-weight RISC-V RV32IMC microcontroller core.
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pipeline works
e5811f8
pipeline: control
2b0ac30
pipeline: We have to be specifically
ce03d04
decode: Timing fix
1f7edfd
Update top-level file
26025bb
writeback: ORI instruction OK
f7dd0a9
execute: Able to execute OR instruction
ae8287c
c_decoder: Removed unused port
ec6032d
regfile: Realized
f5ff742
Update Makefile
b647828
decode: Add compressed_code expander
a72df13
fetch: jump-unaligned by 4 address waiting support
ae3a363
Update README.md
df085e3
decode: joined
5524e6f
0add670