Implementation of the FiGaRO TRNG for FPGAs
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Merge branch 'main' of github.com:secworks/figaro
be14c45View on GitHubAdd initial version of FPGA top, reset gen and constraints
bc382bdView on GitHubAdd testcase that sets sample rate and reads entropy
45a724dView on GitHubDebug initial tb and add ability to set sample rate
f2605feView on GitHubAdd initial version of top level testbench and build target
d60d9abView on GitHubAdd support for FuseSoC integration and Github CI
791df04View on GitHub